Role Overview
As a Staff/Sr. Staff/Principal Physical Design Engineer at Velaura AI, you will be responsible for driving the physical implementation and sign-off of critical blocks for next-generation AI and high-performance computing silicon. You will own complex designs from RTL to GDSII, including synthesis, floorplanning, place and route, clock tree synthesis, timing closure, extraction, physical verification, EM/IR, and final sign-off. You will work closely with architecture, RTL, DFT, verification, STA, CAD, and product engineering teams to achieve aggressive Performance, Power, and Area (PPA) targets
on advanced process technologies. This is a highly visible technical role where you will contribute to physical design methodology, optimize implementation flows, solve complex design closure challenges, and help deliver world-class silicon.
Role Overview
As a Staff/Sr. Staff/Principal Physical Design Engineer at Velaura AI, you will be responsible for driving the physical implementation and sign-off of critical blocks for next-generation AI and high-performance computing silicon. You will own complex designs from RTL to GDSII, including synthesis, floorplanning, place and route, clock tree synthesis, timing closure, extraction, physical verification, EM/IR, and final sign-off. You will work closely with architecture, RTL, DFT, verification, STA, CAD, and product engineering teams to achieve aggressive Performance, Power, and Area (PPA) targets
on advanced process technologies. This is a highly visible technical role where you will contribute to physical design methodology, optimize implementation flows, solve complex design closure challenges, and help deliver world-class silicon.