Visual TL;DR. Ambiguous Requirements Risk addressed by VERIMED System. VERIMED System uses LLMs Formalize Ambiguity. LLMs Formalize Ambiguity reveals SMT Inequivalent Formalizations. SMT Inequivalent Formalizations analyzed by Bidirectional SMT Checking. Bidirectional SMT Checking enables Testable Signals. Testable Signals leads to Boosted Verified Accuracy.
- Ambiguous Requirements Risk: defects propagate into formal models and implemented code, leading to unsafe behavior
- VERIMED System: neurosymbolic pipeline leveraging LLMs and SMT solvers for auditing
- LLMs Formalize Ambiguity: generating multiple, independent formalizations of the same requirement
- SMT Inequivalent Formalizations: signals ambiguity when multiple formalizations are not SMT-equivalent
- Bidirectional SMT Checking: transforms disagreement into a concrete, solver-checkable test
- Testable Signals: precise identification of requirements with multiple plausible interpretations
- Boosted Verified Accuracy: turning ambiguity into testable signals and boosting verified accuracy
Visual TL;DR